The government is aiming to make high-tech small chips of 3-nanometre nodes — used in products like modern smartphones and computers — by 2032, Union minister Ashwini Vaishnaw said on Tuesday.
The minister said the government will focus on six categories of chips — compute, radio frequency (RF), networking, power, sensor, and memory — under the second phase of Design-Linked Incentive Scheme that will allow companies in the country to have major control on developing 70-75 per cent technology products.
“The level of 2032 is to reach 3-nanometer chips manufacturing and design. Design, of course, we are doing even today. But manufacturing we should reach 3 nanometer,” the minister said, after meeting with 24 chip design firms that have been selected under the Design-Linked Incentive Scheme.
The minister said the government now intends to scale up the programme, with a target of enabling at least 50 fabless semiconductor companies in the country in the next phase.
The DLI Scheme aims to accelerate domestic chip design capabilities by supporting startups and companies across areas such as SoCs, telecom, power management, AI, and IoT, thereby strengthening India’s self-reliance in critical semiconductor technologies.
“The companies under DLI have attracted nearly Rs 430 crore in venture capital funding which reflects growing confidence in India’s design ecosystem,” he said.
Vaishnaw said the government wants to focus on six major systems “so that we develop our complete semiconductor design ecosystem in a very comprehensive way”.
“Compute, RF, networking, power, sensor, and memory — we will encourage academia and industry to come up with new ideas, new thoughts, new solutions in these six major categories. As we go into 2029, we will have a major capability of manufacturing and designing the chips, which are required practically in 70-75 per cent of all applications in our country,” the minister said.
He said every sector will require a combination or a permutation of these six types of chips.
The minister said the government is investing Rs 4,500 crore in modernisation of Semiconductor Laboratory in Mohali which will support tape-outs in the 180-nanometre range, while advanced nodes up to 28 nanometres will be enabled through the upcoming fabrication facility at Dholera.
Talking about talent development, Vaishnaw said against a target of 85,000 skilled professionals over 10 years, over 67,000 semiconductor professionals have already been trained in just four years.
